Kestrel 1p3

The Kestrel 1p3 is the third prototype of the Kestrel 1 vision, which is simply to be the least cost implementation of the Kestrel philosophy. It's perhaps even simpler than a Jupiter ACE -- so much so, that it's deaf, dumb, and blind, without third party add-on hardware. And, speaking of which, even that is limited by the fact that it only has one VIA chip! However, with the use of a standardized I/O bus, this truely can be the little computer that could.

On my older web pages, I stated that I would not persue the Kestrel 1 bloodline any further, since it was more intended to be a proof-of-concept than a finished product. However, with the creation of my MVG project, which is also a proof of concept project, I just might release another Kestrel 1 to mate it with. However, in keeping with the least cost philosophy that defines the Kestrel 1 series, it will probably be only marginally more powerful than a Commodore PET or VIC-20.

Memory Map

Note that this computer has no ROM chip. Therefore, on power-up, it does absolutely, 100% nothing of any value. Therefore, you must use a host PC to drive its Initial Program Load (IPL) port to force-feed software into upper RAM memory before it will do anything at all.

Useful Programming Resources

Schematics

You may download the entire GSchem package for the Kestrel 1p3 here. Alternatively, you can use DARCS to fetch the repository, like so:

Historical Pictures During Initial Construction

Overhead shot of CPU, RAM, and VIA chip. Note that no IPL circuitry has been added yet.
Edge-on shot of CPU, RAM, and VIA chip. Note that no IPL circuitry has been added yet.
Isometric view. Notice the rats-nest of wires. Wireless breadboards are like that, and try as I might, making wires neat is nearly impossible to do. Modern Kestrels are now wirewrapped.
+5V supply rail. Notice all the ripple!
Waveform off of I/O pin PA5 on the VIA chip. It's alive!!
Probing address line A11 while executing the code to wig out pin PA5.