A developer's experiment variation of the original Kestrel-2, but equipped with a 64-bit RISC-V core instead of the S16X4A CPU.
As noted in the Kestrel-2 page, even with 32KB of usable RAM, it lacked space for even moderate-sized programs. The MISC architecture S16X4A was measured, and although the processor ran quite fast, it had a code density worse than most RISC architectures. Eventually, the RISC-V project was launched, and upon discovering it, I decided to study how it would fit into the Kestrel-2 environment.
The 2DX's mission was to help me design and validate the RISC-V core; nothing more. To that end, it was a huge success. However, like the original Kestrel-2, it still lacked in resources for any reasonable-sized application. This ultimately lead to the Kestrel-2EX.